EC 413 Computer Organization - Fall 2017


Reading

Lecture Topic Reading
A brief history of computer systems and computing PH-COD - 54.e1-54.e8
PH-COD - Ch 1: p5-7
PH-COD - Ch 1: p11-12
Information representation: Bit, Byte, ... BO-CSPP - Ch 2: p61-65
Unsigned and signed Integer, floating point PH-COD - Ch 2: p73-79
Functions, Recursions, Pointers PH-COD - Ch 2: p96-102
Compilers and Assembly languages PH-COD - Ch 2: p123-132
PH-COD A-2 p756 - A-20 p773
BO-CSPP - Ch 7: p655-672
Stack and Heap structures PH-COD - Ch 2: p103-106
Instruction Set Architecture (ISA) PH-COD - Ch 2: p80-86
PH-COD - Ch 2: p 163.e2
CISC vs. RISC ISAs Original MIPS Paper
BO-CSPP - Ch 4: p342-344
MIPS Instructions Sheet
MIPS assembly languages PH-COD - Ch 2: p111-118
PH-COD - Ch 2: p 163e5
BO-CSPP - Ch 4: p333-341
Brief introduction to digital logic Lecture Notes
Arithmetic Logic Unit (ALU) and Register file PH-COD - Ch 4: p251-256
CPU organization PH-COD - Ch 4: p244-248
CPU: Instruction Execution Stages PH-COD - Ch 4: p256-261
CPU: Execution Control Flow PH-COD - Ch 4: p261-271
Processor Pipelining PH-COD - Ch 4: p271-277
Data and control hazards PH-COD - Ch 4: p277-283
Memory Organizations PH-COD - Ch 5: p374-383
BO-CSPP - Ch 9: Case Study: Intel i7 P799
Caching Principles PH-COD - Ch 5: p383-391
Caches structures PH-COD - Ch 5: p396-409
Introduction to Virtual Memory BO-CSPP - Ch 9: p776-779
Parallel Processors: Instruction Level Parallelism PH-COD - Ch 6: p502-509
Parallel Processors: Data Level Parallelism PH-COD - Ch 6: p509-515
Parallel Processors: Task Level Parallelism PH-COD - Ch 6: p516-519
PH-COD - Ch 6: p519-521
Parallel Processors: Thread Level Parallelism PH-COD - Ch 6: p524-529

D. A. Patterson and J. L. Hennessy, Computer Organization and Design: The Hardware/Software Interface. Morgan Kaufmann, 5th edition, 2013. (PH-COD)

Bryant and O'Hallaron, Computer Systems: A Programmer's Perspective, 3rd Edition, Pearson. (BO-CSPP)

Soft copy of reading materials from BO-CSPP will be provided.