On-chip interconnection networks
M. Kinsy, S. Khadka and M. Isakov: “PreNoc: Neural Network based Predictive Routing for Network-on-Chip Architectures." in the 27th edition of the ACM Great Lakes Symposium on VLSI (GLSVLSI), May 2017.
P. Ren, M. Kinsy, M. Zhu and N. Zheng: “Towards Connectivity-Guaranteed Power-gating Large-scale On-chip Networks", The 7th International Green and Sustainable computing conference (IGSC), Nov 7-9, 2016.[PDF] [bib]
M. Kinsy, S. Khadka, M. Isakov and A. Farrukh: “Hermes: Secure Heterogeneous Multicore Architecture Design.” In the IEEE International Symposium on Hardware Oriented Security and Trust (HOST), May 2017.
Graph Processor Design
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