On-chip Interconnection Networks
K. Soleimani, A. Patooghy, N. Soltani, L. Bu, and M. Kinsy: “Crosstalk Free Coding Systems to Protect NoC Channels Against Crosstalk Faults", In 2017 IEEE 35th International Conference on Computer Design (ICCD) Nov 2017.[PDF] [bib]
E. Taheri, M. Isakov, A. Patooghy, and M. Kinsy: “Advertiser Elevator: a Fault Tolerant Routing Algorithm for Partially Connected 3D Network-on-Chips", In 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS) Aug 2017.[PDF] [bib]
M. Kinsy, S. Khadka and M. Isakov: “PreNoc: Neural Network based Predictive Routing for Network-on-Chip Architectures." in the 27th edition of the ACM Great Lakes Symposium on VLSI (GLSVLSI), May 2017.[PDF] [bib]
P. Ren, M. Kinsy, M. Zhu and N. Zheng: “Towards Connectivity-Guaranteed Power-gating Large-scale On-chip Networks", The 7th International Green and Sustainable computing conference (IGSC), Nov 7-9, 2016.[PDF] [bib]
L. Bu, H. D. Nguyen, and M. A. Kinsy: “RASSS: A perfidy-aware protocol for designing trustworthy distributed systems", In 2017 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), October 23-25, 2017.[PDF] [bib] Best Student Paper Award and Best Paper Candidate.
H. Hosseinzadeh, M. Isakov, M. Darabi, A. Patooghy, and M. Kinsy: “Janus: An uncertain cache architecture to cope with side channel attacks", In 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS) Aug 2017.[PDF] [bib]
M. Kinsy, S. Khadka, M. Isakov and A. Farrukh: “Hermes: Secure Heterogeneous Multicore Architecture Design.” In the IEEE International Symposium on Hardware Oriented Security and Trust (HOST), May 2017.[PDF] [bib]
Graph Processor Design
Adaptive-Approximate Computing Architecture
J. R. Doppa, R. G. Kim, M. Isakov, M. A. Kinsy, H. Kwon and T. Krishna: “Adaptive Manycore Architectures for Big Data Computing.” In the International Symposium on Networks-on-Chip (NOCS), October 2017.[PDF] [bib]
R. S. Agrawal and M. A. Kinsy: “Adaptive-Approximate Cache Architecture.” In the 3rd Career Workshop for Women and Minorities in Computer Architecture, held in conjunction with the 50th IEEE/ACM International Symposium on Microarchitecture (MICRO-50), October, 2017.[PDF] [bib]
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