Many computer organization and computer architecture classes have recently started adopting the RISC-V architecture as an alternative to proprietary RISC ISAs and architectures. Emulators are a common teaching tool used to introduce students to writing assembly. We present the BRISC-V (Boston University RISC-V) Emulator and teaching tool, a RISC-V emulator inspired by existing RISC and CISC emulators. Our emulator is a web-based, pure javascript implementation meant to simplify deployment, as it does not require maintaining support for different OSs or any installation. Here we present the workings, usage, and extensibility of the BRISC-V emulator.

Example RISC-V Assembly Files:

  • gcd.s
  • gcd.c
  • fibonacci.s
  • fibonacci.c
  • binary_search.s
  • binary_search.c
  • Zip file of multiple assembly and C code files.

BRISC-V Emulator Tutorial

  • tutorial.pdf
  • tutorial.pptx

RISC-V Reference