Directions:

Select your BRISC-V Core type, enter the desired parameters and click the "Generate" button.

Core Selection:

Processor Parameters:

Cache Parameters:

Generating Project

Check the Output pane and your downloads for the generated parameter macro file.

Block Diagram:

Decode
Unit
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Fetch
Unit

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Execute
Unit

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Memory
Unit

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Writeback
Unit

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Control
Unit

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Reg
File
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<font color="#ffffff"><br></font>
Instruction
Memory
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4kB
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<font color="#ffffff"><br></font>
Data
Memory
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4kB
[Not supported by viewer]
Memory
Unit

[Not supported by viewer]
Decode
Unit
[Not supported by viewer]
Execute
Unit

[Not supported by viewer]
Fetch
Unit

[Not supported by viewer]
Writeback
Unit

[Not supported by viewer]
Control
Unit
[Not supported by viewer]

<font color="#ffffff"><br></font>
Reg
File
[Not supported by viewer]

<font color="#ffffff"><br></font>
Instruction
Memory
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4kB
[Not supported by viewer]
Data
Memory
[Not supported by viewer]
4kB
[Not supported by viewer]
Commit
Unit

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<font color="#ffffff"><br></font>

<font color="#ffffff"><br></font>
Instruction
Memory
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4kB
[Not supported by viewer]
Data
Memory
[Not supported by viewer]
4kB
[Not supported by viewer]
Decode
Unit

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Instruction
Queue

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Length: 4
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Scheduler
Unit

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Float32
Register
File
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Integer
Register
File
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...
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...
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F-ALU1
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F-ALUn
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ALU1
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ALUn
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Writeback
Unit

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Control
Unit
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Fetch
Unit

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Output: