Class Syllabus

The general format of the course consists of some regular lectures, discussion sections, problem sets, labs and a project.

Grading Policy

• Participation: 5%
• Laboratory Assignments: 35%
• Project: 25%
• Midterm Exam: 20%
• Final Exam: 15%
• Grades will be posted on Blackboard.
• Grades will be assigned two ways:
  • >90 [A], >80 [B], >70 [C], >60 [D]
  • Curved according to the class median. Here your relative score is what really matters, rather than the objective scores above.

Missed Class Policy

Students must contact the instructor prior to missing an exam to schedule a makeup exam. Makeup exams will only be scheduled following an exam in cases of documented emergencies.

Late Submission Policy

Problem sets or laboratory assignments or course project submitted after the due date/time are considered late and will not be graded. Late submissions will only be graded in cases of documented emergencies.

Plagiarism

Discussion of course material and collaboration with other students is encouraged but each student must write/type and submit his/her own solution. Your essays, code and proofs (if applicable) should never contain sections which are identical to the submission of another student, past or present. Submitted work must be entirely that of the student(s) whose name(s) appear(s) on the submission and not solicited in any way from others. Violation of these policies can result in automatic failure of the course.

Please refer to the Texas A&M University’s policy on academic dishonesty.

Tentative Schedule

Tuesday	Thursday
Jan 19 - L01 Influence of Technology and Software on Instruction Sets M. Kinsy	Jan 21 - L02 Intel Pin introduction Laboratory 0 M. Kinsy
Jan 26 - L03 Single-cycle ISA Implementation M. Kinsy	Jan 28 - L04 Pipelining and Hazards Laboratory 0 DUE Laboratory 1 M. Kinsy
Feb 02 - L05 Hazard Resolution M. Kinsy	Feb 04 - L06 Complex Pipelining: Superscalar M. Kinsy
Feb 09 - L07 Complex Pipelining: VLIW M. Kinsy	Feb 11 - L08 Branch Prediction Laboratory 1 DUE Laboratory 2 M. Kinsy
Feb 16 - L09 SIMD and Vector Processors M. Kinsy	Feb 18 - L10 Multithreading M. Kinsy
Feb 23 - L11 GPU Architectures Laboratory 2 DUE M. Kinsy	Feb 25 Review I M. Kinsy
Mar 02 Texas Independence Day	Mar 04 - E01 Midterm Exam M. Kinsy
Mar 09 - L12 Memory Organization Laboratory 3 M. Kinsy	Mar 11 - L13 Advanced Memory Operations M. Kinsy
Mar 16 - L14 Modern Virtual Memory M. Kinsy	Mar 18 No Class - Redefined M. Kinsy
Mar 23 - L15 Process Synchronization M. Kinsy	Mar 25 - L16 Sequential Consistency Laboratory 3 DUE M. Kinsy
Mar 30 - L17 Cache Coherence - Snoopy Cache M. Kinsy	Apr 01 - L18 Cache Coherence - Directory Cache M. Kinsy
Apr 06 - L19 Cache Coherence - Side Channels M. Kinsy	Apr 08 - L20 On-chip Network Architectures M. Kinsy
Apr 13 - L21 On-chip Networking Project Proposals DUE M. Kinsy	Apr 15 - L22 On-chip Routing M. Kinsy
Apr 20 - L23 Micro-Architecture Security M. Kinsy	Apr 22 Review II Mid-Project Reports DUE M. Kinsy
Apr 27 Project Activities M. Kinsy	Apr 29 Project Activities Final Project Report DUE M. Kinsy
May 8 Final Exams	May 10 Final Exams