Course description

This course explores the architectural foundations and design principles that enable high-performance and scalable parallel computing systems. Building on the fundamentals of computer architecture, students will study techniques for exploiting instruction-, data-, and thread-level parallelism in modern multi-core and heterogeneous processors. Topics include superscalar and vector architectures, memory consistency and cache coherence, GPU architecture and programming, and advanced memory systems such as DRAM, non-volatile memory, and Processing-in-Memory. The course also introduces network-on-chip interconnects, dataflow and systolic architectures for machine learning acceleration, and methods for workload mapping and optimization. Emphasis is placed on performance modeling, design trade-offs, and architectural innovations that drive the evolution of parallel and accelerated computing.

Objectives

Upon successful completion of this course, students will be able to:

• Characterize workloads, model performance, and apply Amdahl’s and Gustafson’s Laws to guide design decisions.
• Explain ILP, DLP, and TLP and their use in superscalar, VLIW, SIMD, and vector architectures.
• Analyze multi-threaded architectures and evaluate hardware/software trade-offs.
• Assess consistency models, cache coherence protocols, DRAM, PIM, and emerging NVM technologies.
• Describe and compare NoC topologies, routing, and throughput considerations.
• Develop and optimize GPU programs using CUDA and the SIMT execution model.
• Examine and propose optimizations for dataflow and systolic architectures in ML acceleration and other emerging applications.
• Apply performance analysis to optimize workloads for parallel and high-performance architectures.
• Engage in research in computer architecture.

Textbook

J. L. Hennessy and D. A. Patterson. Computer Architecture: A Quantitative Approach. Morgan Kaufmann, 2017 (6th edition)

Term Office Hours

• Prof. Kinsy: Monday 3:30pm - 4:30pm, Wednesday 3:30pm - 4:30pm, and by appointment. Office: BYENG 390, part of the BYENG 395 Suite - STAM Center.