Co-located with ISPASS

The First International Workshop on Secure RISC-V (SECRISC-V) Architecture Design Exploration seeks original research papers on the design, implementation, verification, and evaluation of micro-architecture security features, hardware-assisted security techniques, and secure executions around the RISC-V instruction set architecture (ISA).

ISPASS Conference: April 5-7, 2020 - Boston, Massachusetts, USA.


Submission of early work is encouraged. The RISC-V ISA based topics of specific interest for the workshop include, but are not limited to:

The paper must be submitted in PDF format. The content of the submission is limited to four (4) pages - 8.5"x11" single-spaced double-column.