CSE 420 Computer Architecture I - Spring 2022
Reading
| Lecture Topic | Reading |
| History of Computer Architecture | App L |
| Influence of Technology and Software on Instruction Sets | Ch 1: p2-61 |
| From Non-Pipelined ISA Implementation | App A: p2-32 |
| Instruction Pipelining and Hazards | App C: p2-11 (background: P&H Ch 6) |
| Complex Pipelines: Superscalar | App C: p43-81 |
| VLIW/EPIC | App H |
| Vector processors | Ch 4: p262-288 |
| Multithreading | Ch 3: p223-247 |
| GPUs | Ch 4: p288-315 |
| Caches | Ch 2: p72-96 App B: p2-40 |
| Branch Prediction | Ch 3: p162-167 |
| Memory Management | Ch 2: p105-131; App B: p40-60 |
| Advanced Memory Operations | Lecture Notes |
| Modern Virtual Memory | Lecture Notes |
| Synchronization and Sequential Consistency | Ch 5: p392-400 |
| Cache Coherence | Ch 5: p351-386 |
| Directory-Based Cache Coherence Protocols: Part I | Ch 5: p351-386 |
| Directory-Based Cache Coherence Protocols: Part II | Lecture Notes |
| Relaxed Memory Models | Ch 5: p394-400 |
| On-Chip Networking | [Dally & Towles] Chapters provided here: Introduction [pdf] - Router [pdf] |
